PAST PROJECTS

• REFLECS1, REconfigurable FiLter-banks of Efficient Channelisation for Satellites (REFLECS1) addressing the challenges for power aware reconfigurability with low complexity, Funding: European Space Agency-Artes (ESA-Artes), ESA, started 2018 and ongoing due to end December 2020
• AF3, “Advanced Forest Fire Fighting” (AF3),
http://cordis.europa.eu/project/rcn/185483_en.html, and http://af3project.eu, Funding: FP7- SEC, Dates:2014-05-01 to 2017-04-30 (36 months)
• REFLECS, REconfigurable FiLter-banks of Efficient Channelisation for Satellites (REFLECS),
Funding: ESA-Artes 5.1, ESA Contract No. 4000112150/14/NLj AD, Dates: 2015-05-01 to Izzet Kale 5 / 19 ICA\R1\201474 2018-05-30
• AutMal, Automated Low Cost System for Malaria Diagnosis and Classification, Funding: UKIndia Education and Research Initiative (UKIERI), Grant Reference: UKUTP201100265, Dates: 2012-01-02 to 2016-12-31
• ETObP, Efficient Techniques for On-Board Processing, Funding: ESA-ESTEC, ESTEC Contract no. 4000102962, Dates: 2011-07-01 to 2014-05-30
• iNsight, “Extending the Applications and Improving the Efficiency of Positioning Through the Exploitation of New GNSS Signals”, https://gow.epsrc.ukri.org/NGBOViewGrant.aspx?GrantRef=EP/G017107/1, and
http://www.insight-gnss.org/, Funding: UK Engineering and Physical Sciences Research Council, EPSRC Large Grants Project, RC grant reference EP/G017107/1, Dates: 2009-01-01 to 2013-07-30.
• Advanced filter banks for Onbard processing engines for satellites, with Astrium, for the European Space Agency, September 2014
• Continuation of Onboard DSP processing engines for satellites, sponsored by the European Space Agency and Astrium Ltd., January 2013
• Onboard DSP processing engines for satellites, sponsored by the European Space Agency and Astrium Ltd., April 2011
• PARK funding from the LDA. for “Wideband Jitter Insensitive CT Sigma-Delta Prototyping”,.12 April 2010
• PARK funding, for the commercialisation activity of the CT Jitter Insensitive Sigma-Delta ADC, Confirmed June 2009
• PARK funding, for the IC fabrication of ADVRGs’ Jitter insensitive CT-Sigma-Delta Modulator, 180 nano metre CMOS process, 1st May 2008,
• PARK funding, for a Feasibility Study for a Miniaturised Galileo Receiver Architecture funding, 1st January 2006.
• HEIF2 funding for the Digital Processing of X-Ray Images from Diamonds, for reliable identification of the source of the diamonds, from HEIF2, July 2006
• Mitsubishi VIL for the Feasibility study, “Development of a Software Global Positioning System (GPS) Receiver”, for Mitsubishi VIL, Guildford, UK. Due to complete early February 2005.
• PARK funding, for IP protection funding from PARK for the Impairment Mitigation of Multicarrier Communication Receivers, 1st May 2005.
• HEFCE, SRIF funding for the "Real-time DSP and VLSI Systems Research Laboratory", funds awarded August 2001-April 2004.
• Radioscape Ltd., for the Investigation of the application of our novel “Image Rejection Receiver with a Decimation Filter Structure for FM and DAB Applications”, for Radioscape Ltd., London UK, completed August 2004
• Zarlink Semiconductor, for Applied research and development project, “Investigation and Correction of Tonal Contamination in an Audio Sigma-Delta Codec”, for Zarlink Semiconductor, Roborough, UK, and San Diego, USA, completed August 2004.
• Bromcom plc, Case study, “Hidden Node Problem”, for Bromcom plc. London, UK, completed early August 2004
• Mitsubishi Electric Ltd., for DCRadio, Design and implementation of Digitally Configurable (Software Defined) GPS Radio Receiver, Funding: Mitsubishi Electric Ltd., Guildford, UK, Dates: 2003-02-31 to 2005-02-31
• Zarlink Semiconductor, for Pre-feasibility Study on “Low Cost IS136 Dual Band Phone for the US Market, (Tempest Project)”, for Zarlink Semiconductor, Cheney Manor, Swindon, UK. Completed 20th September 2002.
• British Council, Research Exchange ARC Programme with Prof. V. Tavsanoglu (Yildiz University, Turkey) and Prof. R Tetzlaff (Germany), seed funding for research partnership in “Cellular Neural Networks”, November 2002
• MathWorks Inc., Development of a Matlab Frequency Transformation Toolbox for the Izzet Kale 6 / 19 ICA\R1\201474
MathWorks Inc., with A. Krukowski, Boston, U.S.A., applied research and development contract awarded February 2001.
• Agere Technologies and ChipIdea, for Communications Processor, technology transfer training, February 2001.
• Zarlink Semiconductor, Continuation of General DSP & VLS1 Systems Applied Research Consultancy for the design of the Arista Hearing Aid Chip for Zarlink Semiconductor, San Diego, U.S.A., with Dik Morling. Completed Oct 2001.
• MITEL Semiconductor Ltd., Continuation of General DSP & VLS1 Systems Applied Research Consultancy for the design of the Arista Hearing Aid Chip for MITEL Semiconductor Ltd., with D. Morling, April 2000 - May 2001.
• Lucent Technologies, Applied Research Consultancy for Lucent Technologies, Swindon. "Design of decimation filter for the next generation wide-band channel communication systems" December 2000.
• Dialog Semiconductor, Applied Research Consultancy for Dialog Semiconductor, Swindon, "Design of the Sigma-Delta Interpolator for the stereo DAC MP3 filter coefficients" October - November 2000.
• Mitsubishi Electric Ltd.,Design and implementation of an all Software DAB Radio Receiver, for Mitsubishi Electric Ltd., Guildford, in 1999.
• NOKIA Telecommunications Ltd., Design and FPGA implementation of a Sigma-Delta based fast hopping fractional-N frequency synthesiser, for NOKIA Telecommunications Ltd., Camberley, in 1999.
• Lucent Technologies Ltd., Research studentship award for one year, from Lucent Technologies Ltd., Swindon, in 1999.
• University of Westminster EIC, Continuation of University of Westminster EIC funding for the development of - Fully Interactive Virtual Classroom, in 1999.
• MITEL Semiconductor Ltd., Complete (algorithmic, structural & architectural) design & silicon integration and implementation of a mixed-signal, Sigma-Delta and Allpass polyphase based low-power CODEC, for use within a Completely In Canal (CIC) digital hearing aid chip, for MITEL Semiconductor Ltd., Swindon UK, & Starkey Labs. Inc., Colorado Springs, USA., in 1999.
• MITEL Semiconductor Ltd., General DSP and VLSI systems Applied Research Consultancy for MITEL Semiconductor Ltd., Swindon UK., for work done in 1998., payment in 1999.
• Mitsubishi Electric Ltd., Continuation of design and implementation of an all Software DAB Radio Receiver, for Mitsubishi Electric Ltd., Guildford, in 1999.
• Panasonic Europe Ltd., Design & Development of a Software Radio Cellular Basestation System- a Feasibility Study, for Panasonic Europe Ltd., UK., in 1998.
• University of Westminster EIC funding for project- Interactive Virtual Classroom, in 1998.
• Sigma-Delta training and Applied Research Consultancy for Burr-Brown Europe Ltd., Livingston, Scotland, in 1997.
• GEC Plessey Semiconductor Ltd., Continuation of DSP and Sigma-Delta based Applied Research Consultancy and design activity, for GEC Plessey Semiconductor Ltd., Swindon, in 1997.
• GEC Plessey Semiconductor Ltd., Applied Research Consultancy for the complete (algorithmic, structural and architectural) design, implementation and silicon integration of a GSM basestation Sigma-Delta ADC, for GEC Plessey Semiconductor Ltd., Swindon, in 1996.
• EPSRC three-year research studentship award, in 1996.
• DIALOG Semiconductor Ltd., Applied Research Consultancy for the continuation of 13-bit linear mixed-signal, Sigma-Delta based CODEC from 1993, and Design and implementation of a set of GSM base station CODECs, for DIALOG Semiconductor Ltd., Swindon, in 1994.
• DIALOG Semiconductor Ltd., Applied Research Consultancy for DSP training workshops for DIALOG Semiconductor Ltd., Swindon, in 1994.
• DIALOG Semiconductor Ltd., for Applied Research Consultancy for Trouble-shooting and Izzet Kale 7 / 19 ICA\R1\201474
Current Position Start Date correction of an integrated Sigma-Delta based mixed-signal compander used in mobile telephone systems, for DIALOG Semiconductor, Ltd., Swindon, UK., in 1993.
• EPSRC Research grant, for the “Extension of Balanced Model Reduction Techniques for Flexible Digital Filter Design”, EPSRC research grant, 1993-1996
• DIALOG Semiconductor Ltd., for Applied Research Consultancy for the Complete (algorithmic, structural and architectural) design and silicon integration and implementation of a 13-bit linear mixed-signal, Sigma-Delta based CODEC (ADC and DAC), for use with digital mobile telephone systems, namely GSM, for DIALOG Semiconductor Ltd., in 1993.
• DIALOG Semiconductor Ltd. UK., Applied Research Consultancy for the Feasibility study and architectural design, with a view to custom-silicon implementation, of the Digital Section of a Sigma-Delta CODEC, DIALOG Semiconductor Ltd. UK., in 1993.
• B&W Loudspeakers Ltd. UK., Applied Research Consultancy for the Feasibility study and architectural design, with a view to custom-silicon implementation, of an oversampled PWM 28- bit Digital to Analog Converter for very high-fidelity audio applications, B&W Loudspeakers Ltd. UK., in 1992.
• Silicon Micro Systems (SMS) Ltd., for Applied Research Consultancy for the Design of a set of digital/switched-capacitor filters for an integrated very low frequency, vehicle burglar alarm system, for Silicon Micro Systems (SMS) Ltd., UK., in 1989.
• IMP Europe Ltd., UK., for Applied Research Consultancy for the Design of a programmable switched-capacitor ladder-filter chip-set for duplex modem systems complying with the CCITT magnitude and group delay specification, for IMP Europe Ltd., UK., in 1988.
• Scantronic Ltd., for Applied Research Consultancy for the Complete (algorithmic, structural andarchitectural) design, and gate array implementation of a wireless FSK burglar alarm subsystem, for Scantronic Ltd., UK., in 1986.